1. Assignment 1

  • Worth: 5%

  • DUE: Monday January 26, 11:55pm; submitted on MOODLE.

1.1. Provided Files

Incomplete Digital files are provided for the questions for Parts 2 and 3. These files contain tests, designated space for building circuits, and labelled inputs and outputs.

These files can be downloaded from here.

Uncompress this folder and open the files within Digital. Each question specifies which of the file to work in.

1.2. Part 1 — Non-Digital

This portion of the assignment will not make use of the Digital simulation software. All answers must be typed and use proper math typesetting, where appropriate.

  1. Given the 26 letters of the alphabet

    1. What is the fewest number of bits needed to give each letter a unique bit pattern?

    2. How many bits would be needed for both lowercase and uppercase letters?

    3. How many bits would be needed to identify uppercase and lowercase letters, and numerals (the 10 digits)?

  2. Create a table showing all 4 bit binary integers and their corresponding decimal value.

    Example start of the table

    Binary

    Decimal

    \(0000_{2}\)

    \(0_{10}\)

    \(0001_{2}\)

    \(1_{10}\)

    ...

    \(...\)

    ...

    \(...\)

  3. Convert the following binary (base 2) numbers to decimal (base 10) — show all work.

    1. \(10101010_{2}\)

    2. \(01010101_{2}\)

    3. \(11111010_{2}\)

  4. Convert the following decimal (base 10) numbers to binary (base 2) — show all work.

    1. \(123_{10}\)

    2. \(31_{10}\)

    3. \(128_{10}\)

  5. Convert the following numbers between the specified bases — show all work.

    1. \(123_{5}\) = \(?_{4}\)

    2. \(123_{7}\) = \(?_{8}\)

    3. \(123_{8}\) = \(?_{16}\)

  6. Add the following binary numbers and leave the result in binary — show all work (e.g. carrying).

    • For visual clarity, the typesetting of binary numbers is changed for this and the following questions.

    1. 1010 + 101

    2. 1010011 + 101011

    3. 1111 + 1

  7. Perform the following bitwise boolean operations (perform the operation on each bit, in order, to obtain the result).

    1. NOT 1010

    2. 1010 AND 1100

    3. 1010 OR 1100

  8. Generate truth tables for each of the following boolean expressions.

    1. \(\lnot a \land b\)

    2. \(a \lor (a \land b)\)

    3. \(\lnot a \land \lnot b\)

  9. Demonstrate the two De Morgan’s laws with truth tables (one table for each).

  10. With truth tables, show how \(and\), \(or\), and \(not\) operations can be achieved with only

    1. \(nand\)

    2. \(nor\)

1.3. Part 2 — Digital

This portion of the assignment will make use of the Digital simulation software.

  1. Create NOT, OR, and AND gates with N-channel transistors.

    • Use the provided file titled “2_1-not_or_and.dig”

    • Use the corresponding space within the provided file

    • You may move the inputs and outputs if necessary and resize the labelled boxes

    • Run tests to ensure functional correctness

  2. Create NOR and NAND with three N-channel transistors each.

    • Use the provided file titled “2_2-nor_nand_three.dig”

    • Use the corresponding space within the provided file

    • You may move the inputs and outputs if necessary and resize the labelled boxes

    • Run tests to ensure functional correctness

  3. Create NOR and NAND with two N-channel transistors each.

    • Use the provided file titled “2_3-nor_nand_two.dig”

    • Use the corresponding space within the provided file

    • You may move the inputs and outputs if necessary and resize the labelled boxes

    • Run tests to ensure functional correctness

    • Hint Take special note of the design of the NOT gate built with a transistor

  4. Create NOT, OR, and AND using only NAND transistor configurations

    • Use the provided file titled “2_4-nand_universal.dig”

    • Use the corresponding space within the provided file

    • You may move the inputs and outputs if necessary and resize the labelled boxes

    • Run tests to ensure functional correctness

  5. Create NOT, OR, and AND using only NOR transistor configurations

    • Use the provided file titled “2_5-nor_universal.dig”

    • Use the corresponding space within the provided file

    • You may move the inputs and outputs if necessary and resize the labelled boxes

    • Run tests to ensure functional correctness

  6. Create XOR (exclusive or) with N-channel transistors

    • Use the provided file titled “2_6-xor.dig”

    • Use the corresponding space within the provided file

    • You may move the inputs and outputs if necessary and resize the labelled boxes

    • Run tests to ensure functional correctness

    • Hint: Think about the solution in terms of the logic gates

1.4. Part 3 — Selectors

  1. Create a circuit where the output of some input can be inverted with some other signal

    • Use the provided file titled “3_1-bit_inverter.dig”

    • Logic gates may be used

    • Below is a truth table describing the desired functionality

    Bit Inverter Truth Table

    Input

    Invert

    Output

    0

    0

    0

    0

    1

    1

    1

    0

    1

    1

    1

    0

  2. Create a 1 bit selector circuit such that one of two inputs is mapped to the output with the following constraints

    • A multiplexer may not be used

    • Only drivers and NOT may be used

    • Use the provided file titled “3_2-input_selector.dig”

    • Below is a truth table describing the desired functionality

      • Here, A and B are variable inputs that can take on either 0/1

    1 Bit Selector Truth Table

    \(i_{0}\)

    \(i_{1}\)

    \(s\)

    \(o\)

    A

    B

    0

    A

    A

    B

    1

    B

  3. Create a circuit that can map one of two inputs to one of two outputs with the following constraints

    • A multiplexer may not be used

    • Only drivers and NOT may be used

    • Hint: Use the general bit selector design from the previous question

    • Use the provided file titled “3_3-input_output_selector.dig”

    • Below is a truth table describing the desired functionality

      • Note that Z denotes the high impedance state and does not represent some variable input

    1 Bit Input/Output Selector Truth Table

    \(i_{0}\)

    \(i_{1}\)

    \(s_{i}\)

    \(s_{o}\)

    \(o_{0}\)

    \(o_{1}\)

    A

    B

    0

    0

    A

    Z

    A

    B

    0

    1

    Z

    A

    A

    B

    1

    0

    B

    Z

    A

    B

    1

    1

    Z

    B

  4. Create a circuit that can map one of four inputs to one of four outputs with the following constraints

    • Multiplexers and demultiplexer may be used

    • Use the provided file titled “3_4-plex_input_output_selector.dig”

1.5. Some Hints

  • Work on one part at a time

  • Some parts of the assignment build on the previous, so get each part working before you go on to the next one

  • Test each design as you build it

    • This is a really nice thing about these circuits; you can run your design and see what happens

    • Mentally test before you even implement — what does this design do? What problem is it solving?

  • If you need help, ask

    • Drop by office hours

1.6. Some Marking Details

Warning

Just because your design produces the correct output and the tests pass, that does not necessarily mean that you will get perfect, or even that your design is correct.

Below is a list of both quantitative and qualitative things we will look for:

  • Correctness?

  • Did you follow instructions?

  • Label names?

  • Design, layout, and style?

  • Did you do weird things that make no sense?

1.7. What to Submit to Moodle

  • Submit any necessary PDF files to Moodle

    • Submissions for the non-digital portion of assignments that are not PDFs will not be marked

    • PDFs must be generated from typed documents

      • No PDFs of written work

    • If necessary, save or print word processor files as PDFs

  • Submit your completed Digital (.dig) files to Moodle

  • Do not compress the files before uploading to Moodle

Warning

Verify that your submission to Moodle worked. If you submit incorrectly, you will get a 0.

1.8. Assignment FAQ